1. Field
The present disclosure relates to a semiconductor substrate and a manufacturing method thereof, and a semiconductor packaging structure including the substrate. Particularly, the present disclosure relates to a semiconductor substrate without electroplating line design and a manufacturing method thereof.
2. Description of the Related Art
In a conventional embedded circuit substrate, a conductive circuit layer is located on a surface of the substrate and is exposed at the surface of the substrate, where the conductive circuit layer may include multiple bonding pads and conductive traces. A semiconductor chip is disposed on the substrate, and the chip electrically connects to the bonding pads and the conductive traces through bonding wires. Generally, to effectively keep the bonding wires connected onto the bonding pads, a surface treatment layer is plated on the bonding pads. Electroplating lines are thus included in the circuit layout design, and the electroplating lines may connect the bonding pads and the conductive traces onto a holder of the substrate, to form the surface treatment layer on the bonding pads by electroplating. However, the electroplating lines increase trace pitch, which is contrary to a demand for size reduction of electronic products.